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April 11th, 2017, 04:52 PM  #1 
Member Joined: Jan 2014 Posts: 42 Thanks: 0  Help needed solving a digital logic problem
Hi, I'm not quite sure how to tackle this digital logic problem. How do I minimise the number of NAND gates. I can Kmap it using the SOP and implement NAND gates to solve but I seem to have a lot of NAND gates in my solution. Any help is appreciated. 
April 12th, 2017, 01:09 AM  #2 
Senior Member Joined: Apr 2014 From: UK Posts: 786 Thanks: 294 
I don't understand the form of the question.

April 12th, 2017, 02:20 AM  #3 
Global Moderator Joined: Dec 2006 Posts: 18,250 Thanks: 1439 
2) Implement the function given below using A minimum number of NAND gates only. F(A,B,C,D) = ∑m(7,10,11,13,15), d(A,B,C,D) = ∑m(5,14) The problem is repeated above. I have no idea why it includes "A minimum" rather than "a minimum". Is this problem from a textbook? I assume that A, B, C and D are binary inputs (0 or 1) to the function F, which gives 1 or 0, depending on the values of the inputs, and that converting the values 7, 10, etc. to 4bit binary gives 0111, 1010, etc., which represent the values of A, B, C and D for which the function gives 1, else it gives 0, except for inputs corresponding to 5 or 14, for which the value of F doesn't matter. 
April 14th, 2017, 04:04 AM  #4 
Senior Member Joined: Apr 2014 From: UK Posts: 786 Thanks: 294 
mdocka1, can you show what you have so far?


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